A novel memory structure in the CPU

Prof. Shahar Kvatinsky | Electrical and Computer Engineering


Information and Computer Science | Physics and Electro-Optics

The Technology

SRAM is the commonly used memory technology in CPU. The low density and high static power limit the amount of data that can be stored in buffers, register files, and caches, just to name a few. This calls for new memory technologies with higher densities and no leakage are investigated. In recent years, novel memory technologies such as Resistive RAM (RRAM) and Spin Torque Transfer Magnetoresistive RAM (STT-MRAM), have been developed. All of these technologies are nonvolatile, store data as resistance, and can be defined as “memristors.” Memristors are power efficient, dense, and fast as compared to standard memory technologies such as SRAM, DRAM, and Flash. Memristors therefore provide the opportunity to place the MPRs physically within the pipeline stages.

The technology is based on a novel hybrid memory structure – the Multistate Pipeline Register (MPR), supports the micro-architectural state of multiple different threads within the execution pipeline stages, where only one thread is active at a given time. The MPRs eliminate the need to flush in-flight instructions and therefore significantly improve performance and lowers energy.


  • This architecture can use SRAM or emerging memory technologies to enhance the performance and energy efficiency of the processor with no drawbacks
  • The operational mechanism due to the use of memristors runs on lower power and has lower complexity than conventional multithreaded processors

Applications and Opportunities

  • This architecture can be applied in any general purpose processors built for portable or embedded systems and servers
  • CPU manufacturers
  • IoT manufacturers
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Shikma Litmanovitz
Director of Business Development, Physical Science