The impending end of Moore’s law and Dennard’s scaling require rethinking the way computing is performed. Thus, several neuro-inspired architectures have been proposed, shifting the spotlight from the traditional von Neumann paradigm to neuromorphic computing.
To implement this new paradigm, researchers have turned to machine learning (ML) for inspiration, as it has already achieved adaptive and error-tolerant training in a software environment. Artificial Neural Networks (ANNs) are an example of such trainable architectures. The building blocks of these architectures are synapses that could be trained to store weights for the network functionality, and neurons that collectively interact to encode and transmit information. Unfortunately, handling these computationally intensive arithmetic operations, even in custom designed hardware, is constrained. Implementing hardware ANNs requires novel circuits and devices (memristors), capable of handling fast vector multiplications with added non-volatile storage capabilities.
However, several challenges have hindered the practical use of memristor technology.
The technology include innovative solutions for integrating memristors in neural networks hardware for both inference and training, including designing and programming high performance data converters (analog to digital, digital to analog, and trainable converters).
- Improved training and inference accuracies
- High energy efficiency
- High throughput
- Improved figure-of-merit for data converters
Applications and Opportunities
- Neuron activation function in hardware deep neural networks implementation for machine learning accelerators (inference and training for computer vision, speech recognition, automotive, and finance)
- Programming algorithm controller for multi-level cells non-volatile memory
- Analog and mixed-signal circuits (ADC, DAC, imagers …)